This short video clip demonstrates the impact of noise and spurs on Vcc of an IC for high speed serial data communication IC. For this demonstration we generate pseudo random data clocked at 1.6 GHz using a BERT. Onto the high speed differential signal path we introduce Noisecom’s J7000 random jitter generator which takes in the differential serial data and adds AWGN noise to it. The output of J7000 then drives a data/clock buffer IC as a DUT (see diagram below). The Vcc of the IC is connected to the JV9000, our noise on Vcc test solution that introduces noise and spurs on the Vcc supply voltage an IC. The output of the IC is terminated at the detector inputs of the BERT for BER and eye diagram analysis.